Across a wide spectrum of computing applications involving signal processing, the growth in signal processing complexity can exceed the processing capabilities of stand-alone processor, such as without limitation, digital signal processors (DSPs), PowerPC™ processors and microprocessors. In some of these applications, one may use additional devices to meet the signal processing needs of a given application.
Field-programmable gate array (FPGA) co-processing is well-suited for such applications. When a FPGA chip is connected to a separate processor chip, an interface is needed. The interface selection between the processor and the FPGA may be driven by the application characteristics as well as the available interfaces on the processor. For example, interfaces available may include an external memory interface (EMIF) bus.
Known CCA-based computing devices generally involve a relatively large number of circuit board traces (e.g., copper traces including separate traces to deliver each bit in connection with data and addresses for the data). Due to physical separation (e.g., electrical isolation) that may be needed between the traces, this may result in a need of a relatively large footprint of the CCA, more complex trace analysis, as well as complexity of the CCA layout to avoid racing conditions.
Flash memory devices may be used in a variety of applications to store configuration, program, and/or memory data. Parallel flash memory transmits and receives a plurality of bits at a time, such as 16 or 32 bits. Parallel flash memory may be contrasted with serial flash memory which transfers data one bit at a time (per channel). Serial flash memory may permit a reduction in board space relative to parallel flash memory. However, for conventional computing devices having a processor and a separate FPGA, serial flash memory would result in a substantial loss of speed during a data transfer. In view of the foregoing considerations, it would be desirable to provide improved methodology and apparatus for effecting fast and reliable data transfer of boot code or operating software.